1. Field
Exemplary embodiments relate to methods of manufacturing a semiconductor device. More particularly, exemplary embodiments relate to methods of manufacturing a semiconductor device, which reduce generation of leakage current.
2. Description of the Related Art
Semiconductor devices have been widely developed as information media are popularized. Semiconductor devices having a high operational speed and a large capacity are in demand. Manufacturing techniques for a semiconductor device have been developed to improve an integration degree and a response rate of a device. For example, various devices (e.g., a gate, a transistor, a capacitor and/or a diode) formed on a semiconductor substrate and an isolation layer for defining an active region and a field region have been formed to have reduced dimensions and to raise an integration degree.
Formation of an isolation layer is an early stage process in fabrication of a semiconductor device, and may have an influence on a dimension of an active region and a process margin of subsequent processes. The isolation layer may be generally formed by a local oxidation of silicon (LOCOS) process or a shallow trench isolation (STI) process.
In the LOCOS process, a mask is formed on an active region of a semiconductor substrate, and then an exposed portion of the semiconductor substrate is thermally oxidized. An isolation layer formed by the LOCOS process generally has a bird's beak at edges. An electric field may concentrate to the bird's beak edges, and thus a leakage current may be easily generated through the bird's beak edges. The LOCOS isolation layer may also be formed to invade the active region, so controlling or reducing a dimension of the active region may be difficult. In the STI process, a trench is formed by partially etching the semiconductor substrate, and then an isolation layer is formed by filling the trench with an insulation material. The STI process may overcome the bird's beak problem of the LOCOS process, and may be useful for fabricating a highly-integrated semiconductor device. As a width of the trench decreases and an aspect ratio of the trench increases, however, it may be difficult to form an isolation layer in the trench while reducing or suppressing generation of a void or a seam in the isolation layer.
While the dimensions of the isolation layer and the active region decrease, a size of a semiconductor device such as a gate has become smaller. When a physical dimension of a semiconductor device is reduced, electrical characteristics or reliability of the semiconductor device may be degraded. For example, a gate insulation layer having a relatively small thickness may have a relatively low barrier of charge tunneling, which may cause an increase of a leakage current. When a thickness of the gate insulation layer decreases, for example, to about 20 Å or less, charge tunneling may exponentially increase and a leakage current through the gate insulation layer may also greatly increase. Research for reducing a dimension of a semiconductor device overcoming such problems has been done, but a process for fabricating a reliable semiconductor device having a critical dimension of about 45 nm or less is still a problem to be solved.